JK Flip Flop Simulation

For my final project in Microelectronic Circuits, I explored the JK Latch and simulated it using LTspice. The simulated circuit was created using CMOS-level elements, i.e. nMOS (ALD1106) and pMOS (ALD1107) transistors.

Overview

 

Block-level circuit in LTspice

Circuit

JK Truth Table

Truth Table

Signal Plot

Signal Plot

 
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Buck converter for Formula SAE

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Nonlinear control of Buck converter